NS9750 Microprocessor

ns9750.jpg

The NS9750 uses an ARM926EJ-S core as its CPU, with MMU, DSP extensions, Jazelle Java accelerator, and 8 kB of instruction cache and 4 kB of data cache in a Harvard architecture. The NS9750 runs up to 200 MHz, with a 100 MHz system and memory bus and 50 MHz peripheral bus.

Application Note- NS9750, NS9775, and NS9360 Static Memory Access Limitation

Application Note- NS9750, NS9775, and NS9360 Static Memory Access Limitation

pdf 167.5 KB 7/3/2021

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