-- Generated by boundaryScanGenerate 5.0a-Build20060303.SP02 on 11/08/06 01:46:08 -- BSDL Version 2001 entity chip is generic (PHYSICAL_PIN_MAP : string := "DEFAULT_PACKAGE_NAME"); port ( -- Port List gpio : inout bit_vector( 107 downto 104 ); gpio : inout bit_vector( 49 downto 0 ); mpmcdataio : inout bit_vector( 15 downto 0 ); mpmcaddrout : inout bit_vector( 23 downto 0 ); tck_in : in bit; tdi_in : in bit; tdo_out : out bit; trst_in_n : in bit; tms_in : in bit; rtck_out : out bit; pll_test_n : in bit; bist_en_n : in bit; PLL_AVSS : linkage bit; PLL_AVDD : linkage bit; scan_en_n : in bit; x1_sys_osc : in bit; x2_sys_osc : linkage bit; mpmcclkout : out bit_vector( 0 downto 0 ); reset_n : in bit; mpmcdqmout : out bit_vector( 3 downto 0 ); ns_ta_strb : in bit; sreset_n : in bit; nmpmcoeout : out bit; mpmcckeout : out bit_vector( 0 downto 0 ); nmpmcweout : out bit; rw_n : out bit; nmpmccsout : out bit_vector( 4 downto 0 ); nmpmccasout : out bit; AP10 : out bit; nmpmcrasout : out bit); use STD_1149_1_2001.all; use LVS_BSCAN_CELLS.all; attribute COMPONENT_CONFORMANCE of chip: entity is "STD_1149_1_2001"; --Pin mappings attribute PIN_MAP of chip: entity is PHYSICAL_PIN_MAP; constant DEFAULT_PACKAGE_NAME: PIN_MAP_STRING := "gpio :( N10 , " & -- gpio[107] "P10 , " & -- gpio[106] "M10 , " & -- gpio[105] "R10 , " & -- gpio[104] "D12 , " & -- gpio[49] "A14 , " & -- gpio[48] "A12 , " & -- gpio[47] "B11 , " & -- gpio[46] "D11 , " & -- gpio[45] "A11 , " & -- gpio[44] "A13 , " & -- gpio[43] "B12 , " & -- gpio[42] "D14 , " & -- gpio[41] "B15 , " & -- gpio[40] "A15 , " & -- gpio[39] "B13 , " & -- gpio[38] "C15 , " & -- gpio[37] "D15 , " & -- gpio[36] "B10 , " & -- gpio[35] "C12 , " & -- gpio[34] "C10 , " & -- gpio[33] "D10 , " & -- gpio[32] "G4 , " & -- gpio[31] "G1 , " & -- gpio[30] "G3 , " & -- gpio[29] "G2 , " & -- gpio[28] "F4 , " & -- gpio[27] "F2 , " & -- gpio[26] "F3 , " & -- gpio[25] "E1 , " & -- gpio[24] "E2 , " & -- gpio[23] "E3 , " & -- gpio[22] "D1 , " & -- gpio[21] "C1 , " & -- gpio[20] "B1 , " & -- gpio[19] "D4 , " & -- gpio[18] "D3 , " & -- gpio[17] "C2 , " & -- gpio[16] "G13 , " & -- gpio[15] "G14 , " & -- gpio[14] "F15 , " & -- gpio[13] "F12 , " & -- gpio[12] "F13 , " & -- gpio[11] "E15 , " & -- gpio[10] "E12 , " & -- gpio[9] "E14 , " & -- gpio[8] "J14 , " & -- gpio[7] "J13 , " & -- gpio[6] "J15 , " & -- gpio[5] "J12 , " & -- gpio[4] "H15 , " & -- gpio[3] "H12 , " & -- gpio[2] "H13 , " & -- gpio[1] "G12 ), " & -- gpio[0] "mpmcdataio :(N1 , " & -- mpmcdataio[15] "M1 , " & -- mpmcdataio[14] "L3 , " & -- mpmcdataio[13] "L2 , " & -- mpmcdataio[12] "L4 , " & -- mpmcdataio[11] "L1 , " & -- mpmcdataio[10] "K3 , " & -- mpmcdataio[9] "K2 , " & -- mpmcdataio[8] "K1 , " & -- mpmcdataio[7] "J2 , " & -- mpmcdataio[6] "J3 , " & -- mpmcdataio[5] "J1 , " & -- mpmcdataio[4] "H3 , " & -- mpmcdataio[3] "H4 , " & -- mpmcdataio[2] "H1 , " & -- mpmcdataio[1] "H2 ), " & -- mpmcdataio[0] "mpmcaddrout :(N9 , " & -- mpmcaddrout[23] "R9 , " & -- mpmcaddrout[22] "M9 , " & -- mpmcaddrout[21] "N8 , " & -- mpmcaddrout[20] "P8 , " & -- mpmcaddrout[19] "M7 , " & -- mpmcaddrout[18] "R7 , " & -- mpmcaddrout[17] "N7 , " & -- mpmcaddrout[16] "R6 , " & -- mpmcaddrout[15] "M6 , " & -- mpmcaddrout[14] "P6 , " & -- mpmcaddrout[13] "N6 , " & -- mpmcaddrout[12] "M5 , " & -- mpmcaddrout[11] "P5 , " & -- mpmcaddrout[10] "N5 , " & -- mpmcaddrout[9] "R4 , " & -- mpmcaddrout[8] "R3 , " & -- mpmcaddrout[7] "R2 , " & -- mpmcaddrout[6] "M4 , " & -- mpmcaddrout[5] "N4 , " & -- mpmcaddrout[4] "R1 , " & -- mpmcaddrout[3] "M3 , " & -- mpmcaddrout[2] "N2 , " & -- mpmcaddrout[1] "P1 ), " & -- mpmcaddrout[0] "tck_in : P15 , " & "tdi_in : N14 , " & "tdo_out : M13 , " & "trst_in_n : M14 , " & "tms_in : M12 , " & "rtck_out : N11 , " & "pll_test_n : N15 , " & "bist_en_n : M15 , " & "PLL_AVSS : L12 , " & "PLL_AVDD : L15 , " & "scan_en_n : L13 , " & "x1_sys_osc : K14 , " & "x2_sys_osc : K12 , " & "mpmcclkout :(A6 ), " & -- mpmcclkout[0] "reset_n : A10 , " & "mpmcdqmout :(D9 , " & -- mpmcdqmout[3] "A9 , " & -- mpmcdqmout[2] "C9 , " & -- mpmcdqmout[1] "B9 ), " & -- mpmcdqmout[0] "ns_ta_strb : D8 , " & "sreset_n : C8 , " & "nmpmcoeout : B6 , " & "mpmcckeout :(B7 ), " & -- mpmcckeout[0] "nmpmcweout : B3 , " & "rw_n : D6 , " & "nmpmccsout :(B4 , " & -- nmpmccsout[4] "A4 , " & -- nmpmccsout[3] "C5 , " & -- nmpmccsout[2] "B5 , " & -- nmpmccsout[1] "D5 ), " & -- nmpmccsout[0] "nmpmccasout : C4 , " & "AP10 : A2 , " & "nmpmcrasout : A1 " ; attribute TAP_SCAN_RESET of trst_in_n : signal is true; attribute TAP_SCAN_IN of tdi_in : signal is true; attribute TAP_SCAN_MODE of tms_in : signal is true; attribute TAP_SCAN_OUT of tdo_out : signal is true; attribute TAP_SCAN_CLOCK of tck_in : signal is (1.0000000000000000000e+07, BOTH); attribute COMPLIANCE_PATTERNS of chip : entity is "(pll_test_n,bist_en_n,scan_en_n) (100)"; attribute INSTRUCTION_LENGTH of chip: entity is 23; attribute INSTRUCTION_OPCODE of chip: entity is "IDCODE (11111111111111111111110)," & "BYPASS (00000000000000000000000, 11111111111111111111111)," & "EXTEST (11111111111111111101000)," & "SAMPLE (11111111111111111111000)," & "PRELOAD (11111111111111111111000)," & "HIGHZ (11111111111111111001111)," & "CLAMP (11111111111111111101111) " ; attribute INSTRUCTION_CAPTURE of chip: entity is "xxxxxxxxxxxxxxxxxxxxx01"; attribute IDCODE_REGISTER of chip: entity is "0000" & -- version "0000000000001011" & -- part number "00101111101" & -- manufacturer's identity "1"; -- required by 1149.1 attribute REGISTER_ACCESS of chip: entity is "BOUNDARY ( SAMPLE, PRELOAD )," & "BYPASS ( HIGHZ, CLAMP, BYPASS ) " ; --Boundary scan definition attribute BOUNDARY_LENGTH of chip: entity is 300; attribute BOUNDARY_REGISTER of chip: entity is -- num cell port function safe [ccell disval rslt] " 299 (BC_2 , * , control , 1 ) ,"& " 298 (LV_BC_7 , gpio(16) , bidir , X , 299 , 1 , Z ),"& " 297 (BC_2 , * , control , 1 ) ,"& " 296 (LV_BC_7 , gpio(17) , bidir , X , 297 , 1 , Z ),"& " 295 (BC_2 , * , control , 1 ) ,"& " 294 (LV_BC_7 , gpio(18) , bidir , X , 295 , 1 , Z ),"& " 293 (BC_2 , * , control , 1 ) ,"& " 292 (LV_BC_7 , gpio(19) , bidir , X , 293 , 1 , Z ),"& " 291 (BC_2 , * , control , 1 ) ,"& " 290 (LV_BC_7 , gpio(20) , bidir , X , 291 , 1 , Z ),"& " 289 (BC_2 , * , control , 1 ) ,"& " 288 (LV_BC_7 , gpio(21) , bidir , X , 289 , 1 , Z ),"& " 287 (BC_2 , * , control , 1 ) ,"& " 286 (LV_BC_7 , gpio(22) , bidir , X , 287 , 1 , Z ),"& " 285 (BC_2 , * , control , 1 ) ,"& " 284 (LV_BC_7 , gpio(23) , bidir , X , 285 , 1 , Z ),"& " 283 (BC_2 , * , control , 1 ) ,"& " 282 (LV_BC_7 , gpio(24) , bidir , X , 283 , 1 , Z ),"& " 281 (BC_2 , * , control , 1 ) ,"& " 280 (LV_BC_7 , gpio(25) , bidir , X , 281 , 1 , Z ),"& " 279 (BC_2 , * , control , 1 ) ,"& " 278 (LV_BC_7 , gpio(26) , bidir , X , 279 , 1 , Z ),"& " 277 (BC_2 , * , control , 1 ) ,"& " 276 (LV_BC_7 , gpio(27) , bidir , X , 277 , 1 , Z ),"& " 275 (BC_2 , * , control , 1 ) ,"& " 274 (LV_BC_7 , gpio(28) , bidir , X , 275 , 1 , Z ),"& " 273 (BC_2 , * , control , 1 ) ,"& " 272 (LV_BC_7 , gpio(29) , bidir , X , 273 , 1 , Z ),"& " 271 (BC_2 , * , control , 1 ) ,"& " 270 (LV_BC_7 , gpio(30) , bidir , X , 271 , 1 , Z ),"& " 269 (BC_2 , * , control , 1 ) ,"& " 268 (LV_BC_7 , gpio(31) , bidir , X , 269 , 1 , Z ),"& " 267 (BC_2 , * , control , 1 ) ,"& " 266 (LV_BC_7 , mpmcdataio(0) , bidir , X , 267 , 1 , Z ),"& " 265 (LV_BC_7 , mpmcdataio(1) , bidir , X , 267 , 1 , Z ),"& " 264 (LV_BC_7 , mpmcdataio(2) , bidir , X , 267 , 1 , Z ),"& " 263 (LV_BC_7 , mpmcdataio(3) , bidir , X , 267 , 1 , Z ),"& " 262 (LV_BC_7 , mpmcdataio(4) , bidir , X , 267 , 1 , Z ),"& " 261 (LV_BC_7 , mpmcdataio(5) , bidir , X , 267 , 1 , Z ),"& " 260 (BC_2 , * , internal , X ) ,"& " 259 (BC_2 , * , internal , X ) ,"& " 258 (LV_BC_7 , mpmcdataio(6) , bidir , X , 267 , 1 , Z ),"& " 257 (LV_BC_7 , mpmcdataio(7) , bidir , X , 267 , 1 , Z ),"& " 256 (BC_2 , * , control , 1 ) ,"& " 255 (LV_BC_7 , mpmcdataio(8) , bidir , X , 256 , 1 , Z ),"& " 254 (LV_BC_7 , mpmcdataio(9) , bidir , X , 256 , 1 , Z ),"& " 253 (LV_BC_7 , mpmcdataio(10) , bidir , X , 256 , 1 , Z ),"& " 252 (BC_2 , * , internal , X ) ,"& " 251 (BC_2 , * , internal , X ) ,"& " 250 (LV_BC_7 , mpmcdataio(11) , bidir , X , 256 , 1 , Z ),"& " 249 (LV_BC_7 , mpmcdataio(12) , bidir , X , 256 , 1 , Z ),"& " 248 (LV_BC_7 , mpmcdataio(13) , bidir , X , 256 , 1 , Z ),"& " 247 (LV_BC_7 , mpmcdataio(14) , bidir , X , 256 , 1 , Z ),"& " 246 (BC_2 , * , internal , X ) ,"& " 245 (BC_2 , * , internal , X ) ,"& " 244 (LV_BC_7 , mpmcdataio(15) , bidir , X , 256 , 1 , Z ),"& " 243 (BC_2 , * , control , 1 ) ,"& " 242 (LV_BC_7 , mpmcaddrout(0) , bidir , X , 243 , 1 , Z ),"& " 241 (LV_BC_7 , mpmcaddrout(1) , bidir , X , 243 , 1 , Z ),"& " 240 (LV_BC_7 , mpmcaddrout(2) , bidir , X , 243 , 1 , Z ),"& " 239 (LV_BC_7 , mpmcaddrout(3) , bidir , X , 243 , 1 , Z ),"& " 238 (BC_2 , * , internal , X ) ,"& " 237 (BC_2 , * , internal , X ) ,"& " 236 (BC_2 , * , internal , X ) ,"& " 235 (BC_2 , * , internal , X ) ,"& " 234 (BC_2 , * , internal , X ) ,"& " 233 (BC_2 , * , internal , X ) ,"& " 232 (BC_2 , * , control , 1 ) ,"& " 231 (LV_BC_7 , mpmcaddrout(4) , bidir , X , 232 , 1 , Z ),"& " 230 (LV_BC_7 , mpmcaddrout(5) , bidir , X , 232 , 1 , Z ),"& " 229 (LV_BC_7 , mpmcaddrout(6) , bidir , X , 232 , 1 , Z ),"& " 228 (BC_2 , * , internal , X ) ,"& " 227 (BC_2 , * , internal , X ) ,"& " 226 (BC_2 , * , internal , X ) ,"& " 225 (BC_2 , * , internal , X ) ,"& " 224 (BC_2 , * , internal , X ) ,"& " 223 (BC_2 , * , internal , X ) ,"& " 222 (LV_BC_7 , mpmcaddrout(7) , bidir , X , 232 , 1 , Z ),"& " 221 (BC_2 , * , control , 1 ) ,"& " 220 (LV_BC_7 , mpmcaddrout(8) , bidir , X , 221 , 1 , Z ),"& " 219 (BC_2 , * , internal , X ) ,"& " 218 (BC_2 , * , internal , X ) ,"& " 217 (LV_BC_7 , mpmcaddrout(9) , bidir , X , 232 , 1 , Z ),"& " 216 (BC_2 , * , internal , X ) ,"& " 215 (BC_2 , * , internal , X ) ,"& " 214 (LV_BC_7 , mpmcaddrout(10) , bidir , X , 232 , 1 , Z ),"& " 213 (LV_BC_7 , mpmcaddrout(11) , bidir , X , 232 , 1 , Z ),"& " 212 (BC_2 , * , internal , X ) ,"& " 211 (BC_2 , * , internal , X ) ,"& " 210 (LV_BC_7 , mpmcaddrout(12) , bidir , X , 232 , 1 , Z ),"& " 209 (BC_2 , * , control , 1 ) ,"& " 208 (LV_BC_7 , mpmcaddrout(13) , bidir , X , 209 , 1 , Z ),"& " 207 (BC_2 , * , internal , X ) ,"& " 206 (BC_2 , * , internal , X ) ,"& " 205 (LV_BC_7 , mpmcaddrout(14) , bidir , X , 209 , 1 , Z ),"& " 204 (LV_BC_7 , mpmcaddrout(15) , bidir , X , 209 , 1 , Z ),"& " 203 (BC_2 , * , control , 0 ) ,"& " 202 (LV_BC_7 , mpmcaddrout(16) , bidir , X , 203 , 0 , Z ),"& " 201 (BC_2 , * , internal , X ) ,"& " 200 (BC_2 , * , internal , X ) ,"& " 199 (BC_2 , * , internal , X ) ,"& " 198 (BC_2 , * , internal , X ) ,"& " 197 (LV_BC_7 , mpmcaddrout(17) , bidir , X , 203 , 0 , Z ),"& " 196 (LV_BC_7 , mpmcaddrout(18) , bidir , X , 203 , 0 , Z ),"& " 195 (LV_BC_7 , mpmcaddrout(19) , bidir , X , 203 , 0 , Z ),"& " 194 (BC_2 , * , internal , X ) ,"& " 193 (BC_2 , * , internal , X ) ,"& " 192 (BC_2 , * , internal , X ) ,"& " 191 (BC_2 , * , internal , X ) ,"& " 190 (BC_2 , * , control , 1 ) ,"& " 189 (BC_2 , mpmcaddrout(20) , output3 , X , 190 , 1 , Z ),"& " 188 (BC_2 , mpmcaddrout(21) , output3 , X , 190 , 1 , Z ),"& " 187 (BC_2 , * , internal , X ) ,"& " 186 (BC_2 , * , internal , X ) ,"& " 185 (BC_2 , * , internal , X ) ,"& " 184 (BC_2 , * , internal , X ) ,"& " 183 (BC_2 , mpmcaddrout(22) , output3 , X , 190 , 1 , Z ),"& " 182 (LV_BC_7 , mpmcaddrout(23) , bidir , X , 203 , 0 , Z ),"& " 181 (BC_2 , * , control , 1 ) ,"& " 180 (LV_BC_7 , gpio(104) , bidir , X , 181 , 1 , Z ),"& " 179 (BC_2 , * , control , 1 ) ,"& " 178 (LV_BC_7 , gpio(105) , bidir , X , 179 , 1 , Z ),"& " 177 (BC_2 , * , control , 1 ) ,"& " 176 (LV_BC_7 , gpio(106) , bidir , X , 177 , 1 , Z ),"& " 175 (BC_2 , * , control , 1 ) ,"& " 174 (LV_BC_7 , gpio(107) , bidir , X , 175 , 1 , Z ),"& " 173 (BC_2 , * , internal , X ) ,"& " 172 (BC_2 , * , internal , X ) ,"& " 171 (BC_2 , * , internal , X ) ,"& " 170 (BC_2 , * , internal , X ) ,"& " 169 (BC_2 , * , internal , X ) ,"& " 168 (BC_2 , * , internal , X ) ,"& " 167 (BC_2 , * , internal , X ) ,"& " 166 (BC_2 , * , internal , X ) ,"& " 165 (BC_2 , * , internal , X ) ,"& " 164 (BC_2 , * , internal , X ) ,"& " 163 (BC_2 , * , internal , X ) ,"& " 162 (BC_2 , * , internal , X ) ,"& " 161 (BC_2 , * , internal , X ) ,"& " 160 (BC_2 , * , internal , X ) ,"& " 159 (BC_2 , * , control , 1 ) ,"& " 158 (BC_2 , rtck_out , output3 , X , 159 , 1 , Z ),"& " 157 (BC_2 , * , internal , X ) ,"& " 156 (BC_2 , * , internal , X ) ,"& " 155 (BC_2 , * , internal , X ) ,"& " 154 (BC_2 , * , internal , X ) ,"& " 153 (BC_2 , * , internal , X ) ,"& " 152 (BC_2 , * , internal , X ) ,"& " 151 (BC_2 , * , internal , X ) ,"& " 150 (BC_2 , * , internal , X ) ,"& " 149 (BC_2 , * , internal , X ) ,"& " 148 (BC_2 , * , internal , X ) ,"& " 147 (BC_2 , * , internal , X ) ,"& " 146 (BC_2 , * , internal , X ) ,"& " 145 (BC_4 , x1_sys_osc , clock , X ) ,"& " 144 (BC_2 , * , internal , X ) ,"& " 143 (BC_2 , * , internal , X ) ,"& " 142 (BC_2 , * , internal , 1 ) ,"& " 141 (BC_2 , * , internal , X ) ,"& " 140 (BC_2 , * , control , 1 ) ,"& " 139 (LV_BC_7 , gpio(0) , bidir , X , 140 , 1 , Z ),"& " 138 (BC_2 , * , control , 1 ) ,"& " 137 (LV_BC_7 , gpio(1) , bidir , X , 138 , 1 , Z ),"& " 136 (BC_2 , * , internal , X ) ,"& " 135 (BC_2 , * , internal , X ) ,"& " 134 (BC_2 , * , internal , X ) ,"& " 133 (BC_2 , * , internal , X ) ,"& " 132 (BC_2 , * , control , 1 ) ,"& " 131 (LV_BC_7 , gpio(2) , bidir , X , 132 , 1 , Z ),"& " 130 (BC_2 , * , control , 1 ) ,"& " 129 (LV_BC_7 , gpio(3) , bidir , X , 130 , 1 , Z ),"& " 128 (BC_2 , * , control , 1 ) ,"& " 127 (LV_BC_7 , gpio(4) , bidir , X , 128 , 1 , Z ),"& " 126 (BC_2 , * , control , 1 ) ,"& " 125 (LV_BC_7 , gpio(5) , bidir , X , 126 , 1 , Z ),"& " 124 (BC_2 , * , control , 1 ) ,"& " 123 (LV_BC_7 , gpio(6) , bidir , X , 124 , 1 , Z ),"& " 122 (BC_2 , * , internal , X ) ,"& " 121 (BC_2 , * , internal , X ) ,"& " 120 (BC_2 , * , internal , X ) ,"& " 119 (BC_2 , * , internal , X ) ,"& " 118 (BC_2 , * , control , 1 ) ,"& " 117 (LV_BC_7 , gpio(7) , bidir , X , 118 , 1 , Z ),"& " 116 (BC_2 , * , control , 1 ) ,"& " 115 (LV_BC_7 , gpio(8) , bidir , X , 116 , 1 , Z ),"& " 114 (BC_2 , * , control , 1 ) ,"& " 113 (LV_BC_7 , gpio(9) , bidir , X , 114 , 1 , Z ),"& " 112 (BC_2 , * , control , 1 ) ,"& " 111 (LV_BC_7 , gpio(10) , bidir , X , 112 , 1 , Z ),"& " 110 (BC_2 , * , control , 1 ) ,"& " 109 (LV_BC_7 , gpio(11) , bidir , X , 110 , 1 , Z ),"& " 108 (BC_2 , * , control , 1 ) ,"& " 107 (LV_BC_7 , gpio(12) , bidir , X , 108 , 1 , Z ),"& " 106 (BC_2 , * , internal , X ) ,"& " 105 (BC_2 , * , internal , X ) ,"& " 104 (BC_2 , * , internal , X ) ,"& " 103 (BC_2 , * , internal , X ) ,"& " 102 (BC_2 , * , control , 1 ) ,"& " 101 (LV_BC_7 , gpio(13) , bidir , X , 102 , 1 , Z ),"& " 100 (BC_2 , * , control , 1 ) ,"& " 99 (LV_BC_7 , gpio(14) , bidir , X , 100 , 1 , Z ),"& " 98 (BC_2 , * , control , 1 ) ,"& " 97 (LV_BC_7 , gpio(15) , bidir , X , 98 , 1 , Z ),"& " 96 (BC_2 , * , control , 1 ) ,"& " 95 (LV_BC_7 , gpio(41) , bidir , X , 96 , 1 , Z ),"& " 94 (BC_2 , * , internal , X ) ,"& " 93 (BC_2 , * , internal , X ) ,"& " 92 (BC_2 , * , internal , X ) ,"& " 91 (BC_2 , * , internal , X ) ,"& " 90 (BC_2 , * , control , 1 ) ,"& " 89 (LV_BC_7 , gpio(36) , bidir , X , 90 , 1 , Z ),"& " 88 (BC_2 , * , control , 1 ) ,"& " 87 (LV_BC_7 , gpio(37) , bidir , X , 88 , 1 , Z ),"& " 86 (BC_2 , * , control , 1 ) ,"& " 85 (LV_BC_7 , gpio(40) , bidir , X , 86 , 1 , Z ),"& " 84 (BC_2 , * , control , 1 ) ,"& " 83 (LV_BC_7 , gpio(39) , bidir , X , 84 , 1 , Z ),"& " 82 (BC_2 , * , internal , X ) ,"& " 81 (BC_2 , * , internal , X ) ,"& " 80 (BC_2 , * , internal , X ) ,"& " 79 (BC_2 , * , internal , X ) ,"& " 78 (BC_2 , * , internal , X ) ,"& " 77 (BC_2 , * , internal , X ) ,"& " 76 (BC_2 , * , control , 1 ) ,"& " 75 (LV_BC_7 , gpio(48) , bidir , X , 76 , 1 , Z ),"& " 74 (BC_2 , * , control , 1 ) ,"& " 73 (LV_BC_7 , gpio(43) , bidir , X , 74 , 1 , Z ),"& " 72 (BC_2 , * , control , 1 ) ,"& " 71 (LV_BC_7 , gpio(38) , bidir , X , 72 , 1 , Z ),"& " 70 (BC_2 , * , control , 1 ) ,"& " 69 (LV_BC_7 , gpio(47) , bidir , X , 70 , 1 , Z ),"& " 68 (BC_2 , * , control , 1 ) ,"& " 67 (BC_2 , * , internal , X ) ,"& " 66 (BC_2 , * , control , 1 ) ,"& " 65 (LV_BC_7 , gpio(42) , bidir , X , 66 , 1 , Z ),"& " 64 (BC_2 , * , control , 1 ) ,"& " 63 (LV_BC_7 , gpio(34) , bidir , X , 64 , 1 , Z ),"& " 62 (BC_2 , * , control , 1 ) ,"& " 61 (LV_BC_7 , gpio(49) , bidir , X , 62 , 1 , Z ),"& " 60 (BC_2 , * , control , 1 ) ,"& " 59 (LV_BC_7 , gpio(44) , bidir , X , 60 , 1 , Z ),"& " 58 (BC_2 , * , control , 1 ) ,"& " 57 (LV_BC_7 , gpio(46) , bidir , X , 58 , 1 , Z ),"& " 56 (BC_2 , * , control , 1 ) ,"& " 55 (LV_BC_7 , gpio(45) , bidir , X , 56 , 1 , Z ),"& " 54 (BC_2 , * , internal , X ) ,"& " 53 (BC_2 , reset_n , input , X ) ,"& " 52 (BC_2 , * , control , 1 ) ,"& " 51 (LV_BC_7 , gpio(35) , bidir , X , 52 , 1 , Z ),"& " 50 (BC_2 , * , control , 1 ) ,"& " 49 (LV_BC_7 , gpio(33) , bidir , X , 50 , 1 , Z ),"& " 48 (BC_2 , * , control , 1 ) ,"& " 47 (LV_BC_7 , gpio(32) , bidir , X , 48 , 1 , Z ),"& " 46 (BC_2 , * , internal , X ) ,"& " 45 (BC_2 , * , internal , X ) ,"& " 44 (BC_2 , mpmcdqmout(2) , output3 , X , 68 , 1 , Z ),"& " 43 (BC_2 , * , internal , X ) ,"& " 42 (BC_2 , * , internal , X ) ,"& " 41 (BC_2 , mpmcdqmout(0) , output3 , X , 68 , 1 , Z ),"& " 40 (BC_2 , * , internal , X ) ,"& " 39 (BC_2 , * , internal , X ) ,"& " 38 (BC_2 , mpmcdqmout(1) , output3 , X , 68 , 1 , Z ),"& " 37 (BC_2 , mpmcdqmout(3) , output3 , X , 68 , 1 , Z ),"& " 36 (BC_2 , * , internal , 1 ) ,"& " 35 (BC_2 , * , internal , X ) ,"& " 34 (BC_2 , ns_ta_strb , input , X ) ,"& " 33 (BC_2 , sreset_n , input , X ) ,"& " 32 (BC_2 , * , internal , X ) ,"& " 31 (BC_2 , * , internal , X ) ,"& " 30 (BC_2 , mpmcclkout(0) , output3 , X , 68 , 1 , Z ),"& " 29 (BC_2 , * , internal , X ) ,"& " 28 (BC_2 , * , internal , X ) ,"& " 27 (BC_2 , * , internal , X ) ,"& " 26 (BC_2 , * , internal , X ) ,"& " 25 (BC_2 , * , internal , X ) ,"& " 24 (BC_2 , * , internal , X ) ,"& " 23 (BC_2 , nmpmcoeout , output3 , X , 68 , 1 , Z ),"& " 22 (BC_2 , mpmcckeout(0) , output3 , X , 68 , 1 , Z ),"& " 21 (BC_2 , * , internal , X ) ,"& " 20 (BC_2 , * , internal , X ) ,"& " 19 (BC_2 , * , internal , X ) ,"& " 18 (BC_2 , nmpmcweout , output3 , X , 68 , 1 , Z ),"& " 17 (BC_2 , * , control , 1 ) ,"& " 16 (BC_2 , rw_n , output3 , X , 17 , 1 , Z ),"& " 15 (BC_2 , nmpmccsout(1) , output3 , X , 17 , 1 , Z ),"& " 14 (BC_2 , * , internal , X ) ,"& " 13 (BC_2 , nmpmccsout(2) , output3 , X , 17 , 1 , Z ),"& " 12 (BC_2 , * , internal , X ) ,"& " 11 (BC_2 , * , internal , X ) ,"& " 10 (BC_2 , * , internal , X ) ,"& " 9 (BC_2 , * , internal , X ) ,"& " 8 (BC_2 , nmpmccsout(0) , output3 , X , 17 , 1 , Z ),"& " 7 (BC_2 , nmpmccsout(3) , output3 , X , 17 , 1 , Z ),"& " 6 (BC_2 , nmpmccsout(4) , output3 , X , 17 , 1 , Z ),"& " 5 (BC_2 , * , internal , X ) ,"& " 4 (BC_2 , * , internal , X ) ,"& " 3 (BC_2 , * , internal , X ) ,"& " 2 (BC_2 , nmpmccasout , output3 , X , 17 , 1 , Z ),"& " 1 (BC_2 , AP10 , output3 , X , 17 , 1 , Z ),"& " 0 (BC_2 , nmpmcrasout , output3 , X , 17 , 1 , Z ) "; end chip;